The present invention relates to a semiconductor integrated circuit device and, more particularly, to a technique effective for use in a one-chip microcomputer in which a ROM (i.e., Read Only Memory) to be stored with a data processing program is constructed of an EPROM (i.e., Electrically Programmable Read Only Memory).
In one-chip microcomputers, a predetermined data processing operation is executed in accordance with the program which is written in the built-in ROM. Prior to the present invention, we have conceived the use of an EPROM as the built-in ROM. This use of an EPROM makes it possible to promptly provide a one-chip microcomputer which has the data processing function desired by the user, while, at the same time, improving the mass productivity. If a mask type ROM is used as the aforementioned ROM, more specifically, it takes time to fabricate a variety of masks for writing the program.
In case an EPROM is used as above, it would be convenient to conduct the writing operation by the use of an EPROM writer already existing in the art. As compared with the address space in the microcomputer, however, the ratio to be occupied by the EPROM is far smaller, e.g., 4K (4K.times.8 bits) at most of the address space of 8K. As a result, a large number of errors are caused if the writing operation is conducted by use of the existing EPROM writers (e.g., 8K.times.8 bits=64 Kbits) having the same address space as that of the microcomputer. In case such an existing EPROM writer is used, more specifically, it is desirable that the construction of the usable EPROM writer not be restricted. In accordance with the existing EPROM writer, the address data are renewed sequentially from the start address, and the data to be written are sequentially outputted. The EPROM writer reads out the data written in the EPROM and checks them each time the writing operation into one address is executed. If, in this case, the start address of the EPROM is conveniently coincident with that of the EPROM, the data are written in the EPROM in a normal manner. However, the address space to be given to the built-in EPROM is not always designed to have a range convenient for the EPROM writer. In case the address data outside of the address range of the EPROM are outputted from the EPROM writer at the start of the data writing operation, no data will be written in the EPROM. In this case, it is substantially impossible to check (verify) the write data after the data writing operation is instructed, because the address data designate memories other than the EPROM. As a result, the errors, which should not exist, are detected by executing the verifying operation. Thus, in the operation to write the address designation in which the EPROM is present, its check (or verification) can be made, but all data become erroneous for the remaining write check so that no continuous write is conducted. Incidentally, a high-grade EPROM writer capable of arbitrarily designate the addressing range is presently available, but has a high price and raises a problem in distribution.
Incidentally, an example of an EPROM referred to above is disclosed in Japanese Patent Laid-Open No. 54-152933.